166MHz 위상 고정 루프 기반 주파수 합성기

조세현 송창민 장영찬 2022년

논문상세정보

인용/피인용

논문영향력 요약
동일주제 총논문수	논문피인용 총횟수	주제별 논문영향력의 평균
주제	SoC frequency divider frequency synthesizer multi-phase clock phase-locked loop
63	0	0.0%

논문영향력
주제		주제별 논문수	주제별 논문영향력
주제어	SoC	35	0.0%
	frequency divider	3	0.0%
	frequency synthesizer	10	0.0%
	multi-phase clock	3	0.0%
	phase-locked loop	12	0.0%
계		63	0.0%
* 다른 주제어 보유 논문에서 피인용된 횟수

SAMBA-bus:A high performance bus architecture for systemon-chips
Ruibing Lu [2003]
Multi-Port Arbiter for DDR3 Memory Controller IP Core – Lattice Radiant Software User Guide, FPGA-IPUG-02132- 1.0
Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level
B. Razavi [2020]
Arbiters：Design Ideas and Coding Styles
Matt Weber [2001]
Analysis of Phase Noise in Phase/Frequency Detectors
A. Homayoun [2013]
A review of ultra-low-power and low-cost transceiver design
T. Schumacher [2017]
A 9.2–12.7 GHz wideband fractional-N subsampling PLL in 28 nm CMOS with 280 fs RMS jitter
K. Raczkowski [2015]
A 1.2-V 180-nm CMOS Low-Power Multi-Band Ring Oscillator based Frequency Synthesizer for Edge-Combining Transmitters
M. Stadelmayer [2020]
A 0.1–9-GHz Frequency Synthesizer for Avionic SDR Applications in 0.13-μm CMOS Technology
Z. I. E. Alaoui [2021]