The Oscillation Frequency of CML-based Multipath Ring Oscillators

논문상세정보
' The Oscillation Frequency of CML-based Multipath Ring Oscillators' 의 주제별 논문영향력
논문영향력 선정 방법
논문영향력 요약
주제
  • forwardingfactor
  • mode gain
  • multipath ring oscillator
  • oscillation criterion
  • oscillation frequency
  • oscillation mode
  • oscillator
동일주제 총논문수 논문피인용 총횟수 주제별 논문영향력의 평균
24 0

0.0%

' The Oscillation Frequency of CML-based Multipath Ring Oscillators' 의 참고문헌

  • ’Low-Voltage CMOS Device Scaling
    Chenming Hu ISSCC Digestof Technical : 86 ~ 87 [1994]
  • ’A Novel High-Speed Ring Oscillator for Multiphase Clock Generation Using Negative Skewed Delay Scheme
    Seog-Jun Lee Solid-State Circuits, IEEE Journal of 32 (2) : 289 ~ 291 [1997]
  • The Design and Analysis of Dual-Delay-Path Ring Oscillators
    Zuow-Zun Chen IEEE Transactions on Circuits and Systems I: Regular Papers 58 (3) : 470 ~ 478 [2011]
  • Layout Synthesis and Loop Parameter Optimization of a Low-Jitter All-Digital Pixel Clock Generator
    Wooseok Kim Solid-State Circuits, IEEE Journal of 49 (3) : 657 ~ 672 [2014]
  • Design and Optimization of Multipath Ring Oscillators
    Hafez, A.A Circuits and Systems I: Regular Papers, IEEE Transactions on 58 (10) : 2332 ~ 2345 [2011]
  • An 8 Gb/s64 Mb/s, 2.34.2 mW/Gb/s Burst-Mode Transmitter in 90 nm CMOS
    Talegaonkar, M Solid-State Circuits, IEEE Journal of 49 (10) : 2228 ~ 2242 [2014]
  • A study of phase noise in CMOS oscillators
    Behzad Razavi Solid-State Circuits, IEEE Journal of 31 (3) : 331 ~ 343 [1996]
  • A Multi-Path Gated Ring Oscillator TDCWith First-Order Noise Shaping
    Straayer, M.Z Solid-State Circuits, IEEE Journal of : 1089 ~ 1098 [2009]
  • A Low-Power 0.56.6 Gb/s Wireline Transceiver Embedded inLow-Cost 28 nm FPGAs
    Savoj, J Solid-State Circuits, IEEE Journal of 48 (11) : 2582 ~ 2594 [2013]
  • A Design Method and Developments of a Low-Power and High- Resolution Multiphase Generation System
    Akinori Matsumoto Solid- State Circuits, IEEE Journal of 43 (4) : 831 ~ 843 [2008]
  • A 3.7Gb/s Clock-embedded Intra- Panel Interface for the Large-sized UHD 120Hz LCD TV Application
    H. Jeon SID Symposium Digest [2014]
  • A 3.4Gbps/lane Low Overhead Clock Embedded Intrapanel Interface for High Resolution and Large-Sized TFT-LCDs
    W. Oh SID Symposium Digest [2013]
  • A 2Gbps/lane Source Synchronous Intra-Panel Interface for Large Size and High Refresh Rate Panel with Automatic Calibration
    S. Ozawa SID Symposium Digest [2011]