저 전력 10비트 플래시-SAR A/D 변환기 설계

논문상세정보
' 저 전력 10비트 플래시-SAR A/D 변환기 설계' 의 주제별 논문영향력
논문영향력 선정 방법
논문영향력 요약
주제
  • 전기통신
  • flashadc
  • low power
  • sar adc
동일주제 총논문수 논문피인용 총횟수 주제별 논문영향력의 평균
1,571 0

0.0%

' 저 전력 10비트 플래시-SAR A/D 변환기 설계' 의 참고문헌

  • Split capacitor DAC mismatch calibration in successive approximation ADC
    Y. Chen IEEE CICC : 279 ~ 282 [2009]
  • Design of a low power CMOS 10bit flash-SAR ADC
    G.-Y. Lee 201427th IEEE Int. System-on-Chip Conf.(SOCC) : 88 ~ 91 [2014]
  • Design and experimental verification of a power effective flash-SAR subranging ADC
    U. Chio IEEE Trans. Circuits and Syst. II : 607 ~ 611 [2009]
  • A study of CMOS power amplifier with the novel multi-loop transformer
    K.-J. Kim J. KICS 2013 (11) : 17 ~ 18 [2013]
  • A power management system for appliances over the sensor network
    S. I. Hong J. KICS 2013 (11) : 52 ~ 53 [2013]
  • A digital-domain calibration of split-capacitor DAC for a differential SAR ADC without additional analog circuits
    J. Um IEEE Trans. Circuit and Syst. I 60 (11) : 2845 ~ 2856 [2013]
  • A 6-bit 500MS/s CMOS A/D converter with a digital input range detection circuit
    D. Shi J. KICS 38 (4) : 303 ~ 309 [2013]
  • A 2.3 mW 10-bit 170 MS/s two-step binary-search assisted time-interleaved SAR ADC
    S. Wong IEEE J. of Solid State Circuits 48 (8) : 1783 ~ 1794 [2013]